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/*
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    		 Crown Copyright (c) 1997
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    This TenDRA(r) Computer Program is subject to Copyright
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    owned by the United Kingdom Secretary of State for Defence
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    acting through the Defence Evaluation and Research Agency
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    (DERA).  It is made available to Recipients with a
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    royalty-free licence for its use, reproduction, transfer
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    to other parties and amendment for any purpose not excluding
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    product development provided that any such use et cetera
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    shall be deemed to be acceptance of the following conditions:-
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        (1) Its Recipients shall ensure that this Notice is
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        reproduced upon any copies or amended versions of it;
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        (2) Any amended version of it shall be clearly marked to
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        show both the nature of and the organisation responsible
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        for the relevant amendment or amendments;
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        (3) Its onward transfer from a recipient to another
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        party shall be deemed to be that party's acceptance of
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        these conditions;
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        (4) DERA gives no warranty or assurance as to its
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        quality or suitability for any purpose and DERA accepts
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        no liability whatsoever in relation to any use to which
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        it may be put.
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*/
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/*
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			    VERSION INFORMATION
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			    ===================
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--------------------------------------------------------------------------
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$Header: /u/g/release/CVSROOT/Source/src/installers/sparc/common/regmacs.h,v 1.1.1.1 1998/01/17 15:55:55 release Exp $
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--------------------------------------------------------------------------
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$Log: regmacs.h,v $
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 * Revision 1.1.1.1  1998/01/17  15:55:55  release
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 * First version to be checked into rolling release.
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 *
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 * Revision 1.3  1995/12/15  10:27:01  john
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 * Minor changes
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 *
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 * Revision 1.2  1995/05/26  13:01:37  john
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 * Change for new spec
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 *
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 * Revision 1.1.1.1  1995/03/13  10:18:54  john
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 * Entered into CVS
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 *
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 * Revision 1.2  1994/07/04  09:24:54  djch
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 * Jun94 tape version
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 *
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 * Revision 1.1  1994/05/03  14:50:38  djch
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 * Initial revision
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 *
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 * Revision 1.1  93/06/24  14:59:19  14:59:19  ra (Robert Andrews)
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 * Initial revision
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 * 
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--------------------------------------------------------------------------
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*/
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#ifndef REGMACS_INCLUDED
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#define REGMACS_INCLUDED
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/*
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    SPARC FIXED REGISTERS
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*/
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/* Global registers */
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#define R_G0		0	/* always holds 0 */
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#define R_G1		1
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#define R_G2		2
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#define R_G3		3
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#define R_G4		4
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#define R_G5		5
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#define R_G6		6
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#define R_G7		7
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/* Output registers (input for called procedure) */
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#define R_O0		8
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#define R_O1		9
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#define R_O2		10
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#define R_O3		11
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#define R_O4		12
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#define R_O5		13
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#define R_SP		14	/* stack pointer */
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#define R_O7		15	/* prospective return address */
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/* Local registers */
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#define R_L0		16
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#define R_L1		17
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#define R_L2		18
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#define R_L3		19
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#define R_L4		20
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#define R_L5		21
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#define R_L6		22
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#define R_L7		23
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/* Input (parameter) registers */
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#define R_I0		24
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#define R_I1		25
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#define R_I2		26
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#define R_I3		27
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#define R_I4		28
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#define R_I5		29
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#define R_FP		30	/* frame pointer */
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#define R_I7		31	/* return address */
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/* Temporary scratch register */
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#define R_TMP		R_G1
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/* Range of all fixed registers */
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#define R_FIRST		R_G0
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#define R_LAST		R_I7
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/*
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    SPARC FLOATING POINT REGISTERS
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    Two representations are used in sparctrans, 0...15 to represent 16
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    register-pairs for doubles at the higher (e.g. fregalloc) levels, and
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    0...31 at the lower (assembler) levels.  This is somewhat confusing,
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    conversion is one way using a 'frg << 1'-like expression, often in
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    the parameter position of a ???_ins () function call.
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*/
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/* Floating point registers */
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#define R_F0		0	/* procedure result register */
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/* Range of all floating point registers */
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#define R_FLT_FIRST	0
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#define R_FLT_LAST	15
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/*
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    PSEUDO-REGISTER CODES
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*/
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#define R_NO_REG	100	/* code for no register allocated */
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#define R_USE_RES_REG	101	/* code to indicate result register */
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#define R_DEFER_F0	16	/* code to indicate %f0 to be used */
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/*
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  REGISTER MASKS
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  A register mask, with one bit per register, is used in 'space' etc.
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  A set bit indicates that the register is not available for 
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  allocation.
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*/
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#define	RMASK( r )	( ( ( long ) 1 ) << ( r ) )
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/*
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  REGISTER SETS
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  IS_FIXREG tests for fixed registers, IS_SREG for s-registers (those
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  preserved over procedure calls), and IS_TREG for t-registers (those
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  not so preserved).  PARAM_TREGS gives all the procedure parameter
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  registers (O0-O7)
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*/
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#define IS_FIXREG( r )		( ( r ) >= R_FIRST && ( r ) <= R_LAST )
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#define IS_SREG( r )		( ( r ) >= R_L0 && ( r ) <= R_I5 )
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#define IS_TREG( r )		( ( ( r ) >= R_G2 && ( r ) <= R_G7 ) ||\
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				  ( ( r ) >= R_O0 && ( r ) <= R_O5 ) ||\
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				  ( ( r ) == R_O7 ) )
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#define IS_IN_REG(r)	((r)>=R_I0 && (r)<= R_I5)
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#define PARAM_TREGS		0x0000ff00L
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#define PROC_TREGS		0xffff40ffL
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#define IS_FLT_SREG( r )	0
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#define IS_FLT_TREG( r )	( ( r ) >= 0 && ( r ) <= 15 )
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#define PARAM_FLT_TREGS		0x0000
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#define PROC_FLT_TREGS		0x0000
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#define MAXFLOAT_TREGS		16
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#endif /* REGMACS_INCLUDED */