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.TH ARCH 3
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.SH NAME
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arch \- architecture-specific information and control
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.SH SYNOPSIS
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.nf
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.B bind -a #P /dev
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.sp 0.3v
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.B /dev/archctl
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.B /dev/cputype
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.B /dev/ioalloc
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.B /dev/iob
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.B /dev/iol
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.B /dev/iow
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.B /dev/irqalloc
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.SH DESCRIPTION
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This device presents textual information about PC hardware and allows
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user-level control of the I/O ports on x86-class machines.
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.PP
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Reads from
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.I cputype
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recover the processor type and clock rate in MHz.
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Reads from
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.I archctl
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yield at least data of this form:
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.IP
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.EX
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cpu AMD64 2201 pge
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pge on
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coherence mfence
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cmpswap cmpswap486
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i8253set on
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cache default uc
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cache 0x0 1073741824 wb
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cache 0x3ff00000 1048576 uc
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.EE
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.LP
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Where
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.L AMD64
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is the processor type,
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.L 2201
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is the processor speed in MHz,
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and
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.L pge
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is present only if the `page global extension' capability is present;
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the next line reflects its setting.
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.L coherence
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is followed by one of
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.LR mb386 ,
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.LR mb586 ,
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.L mfence
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or
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.LR nop ,
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showing the form of memory barrier used by the kernel.
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.L cmpswap
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is followed by
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.L cmpswap386
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or
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.LR cmpswap486 ,
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reflecting the form of `compare and swap' used by the kernel.
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.L i8253set
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is a flag, indicating the need to explicitly set
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the Intel 8253 or equivalent timer.
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There may be lines starting with
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.L cache
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that reflect the state of memory caching via MTRRs
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(memory-type region registers).
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The second word on the line is
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.L default
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or a C-style number which is the base physical address of the region;
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the third is a C-style length of the region;
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and the fourth is one of
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.LR uc
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(for uncachable),
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.LR wb
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(write-back),
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.LR wc
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(write-combining),
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.LR wp
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(write-protected),
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or
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.LR wt
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(write-through).
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A region may be a subset of another region, and the smaller region
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takes precedence.
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This may be used to make I/O registers uncachable
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in the midst of a write-combining region mostly used
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for a video framebuffer, for example.
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Control messages may be written to
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.I archctl
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and use the same syntax as the data read from
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.IR archctl .
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Known commands include
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.LR cache ,
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.LR coherence ,
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.LR i8253set ,
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and
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.LR pge .
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.
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.PP
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Reads from
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.I ioalloc
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return I/O ranges used by each device, one line
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per range.
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Each line contains three fields separated by white space: first address
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in hexadecimal,
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last address, name of device.
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.PP
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Reads from
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.I irqalloc
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return the enabled interrupts, one line per
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interrupt.  Each line contains three fields separated by white space:
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the trap number, the IRQ it is assigned to, and the name of
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the device using it.
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.PP
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Reads and writes to
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.IR iob ,
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.IR iow ,
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and
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.I iol
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cause 8-bit wide, 16-bit wide, and 32-bit wide requests to
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I/O ports.
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The port accessed is determined by the byte offset of the
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file descriptor.
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.SH EXAMPLE
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The following code reads from an x86 byte I/O port.
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.IP
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.EX
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uchar
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inportb(unsigned port)
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{
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    uchar data;
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    if(iobfd == -1)
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        iobfd = open("#P/iob", ORDWR);
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    seek(iobfd, port, 0);
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    if(read(iobfd, &data, sizeof(data)) != sizeof(data))
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        sysfatal("inportb(0x%4.4ux): %r", port);
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    return data;
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}
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.EE
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.SH SOURCE
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.B /sys/src/9/pc/devarch.c