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- |
1 |
TEXT ainc(SB), 1, $-4 /* int ainc(int*); */
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2 |
MOVL arg+0(FP), BX
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3 |
MOVL $1, AX
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4 |
LOCK; BYTE $0x0f; BYTE $0xc1; BYTE $0x03/* XADDL AX, (BX) */
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5 |
ADDL $1, AX /* overflow if -ve or 0 */
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6 |
RET
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7 |
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8 |
TEXT adec(SB), 1, $-4 /* int adec(int*); */
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9 |
MOVL arg+0(FP), BX
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10 |
MOVL $-1, AX
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11 |
LOCK; BYTE $0x0f; BYTE $0xc1; BYTE $0x03/* XADDL AX, (BX) */
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12 |
SUBL $1, AX /* underflow if -ve */
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13 |
RET
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14 |
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15 |
/*
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16 |
* int cas32(u32int *p, u32int ov, u32int nv);
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17 |
* int cas(uint *p, int ov, int nv);
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18 |
* int casp(void **p, void *ov, void *nv);
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19 |
* int casl(ulong *p, ulong ov, ulong nv);
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20 |
*/
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21 |
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22 |
/*
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23 |
* CMPXCHG (CX), DX: 0000 1111 1011 000w oorr rmmm,
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24 |
* mmm = CX = 001; rrr = DX = 010
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25 |
*/
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26 |
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27 |
#define CMPXCHG BYTE $0x0F; BYTE $0xB1; BYTE $0x11
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28 |
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29 |
TEXT cas32+0(SB),0,$0
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30 |
TEXT cas+0(SB),0,$0
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31 |
TEXT casp+0(SB),0,$0
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32 |
TEXT casl+0(SB),0,$0
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33 |
MOVL p+0(FP), CX
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34 |
MOVL ov+4(FP), AX
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35 |
MOVL nv+8(FP), DX
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36 |
LOCK
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37 |
CMPXCHG
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38 |
JNE fail
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39 |
MOVL $1,AX
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40 |
RET
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41 |
fail:
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42 |
MOVL $0,AX
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43 |
RET
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44 |
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45 |
/*
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46 |
* int cas64(u64int *p, u64int ov, u64int nv);
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47 |
*/
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48 |
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49 |
/*
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50 |
* CMPXCHG64 (DI): 0000 1111 1100 0111 0000 1110,
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51 |
*/
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52 |
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53 |
#define CMPXCHG64 BYTE $0x0F; BYTE $0xC7; BYTE $0x0F
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54 |
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55 |
TEXT cas64+0(SB),0,$0
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56 |
MOVL p+0(FP), DI
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57 |
MOVL ov+0x4(FP), AX
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58 |
MOVL ov+0x8(FP), DX
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59 |
MOVL nv+0xc(FP), BX
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60 |
MOVL nv+0x10(FP), CX
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61 |
LOCK
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62 |
CMPXCHG64
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63 |
JNE fail
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64 |
MOVL $1,AX
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65 |
RET
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66 |
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67 |
/*
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|
68 |
* Versions of compare-and-swap that return the old value
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|
69 |
* (i.e., the value of *p at the time of the operation
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|
70 |
* xcas(p, o, n) == o
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|
71 |
* yields the same value as
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|
72 |
* cas(p, o, n)
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|
73 |
* xcas can be used in constructs like
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|
74 |
* for(o = *p; (oo = xcas(p, o, o+1)) != o; o = oo)
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|
75 |
* ;
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|
76 |
* to avoid the extra dereference of *p (the example is a silly
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|
77 |
* way to increment *p atomically)
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|
78 |
*
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|
79 |
* u32int xcas32(u32int *p, u32int ov, u32int nv);
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|
80 |
* u64int xcas64(u64int *p, u64int ov, u64int nv);
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|
81 |
* int xcas(int *p, int ov, int nv);
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|
82 |
* void* xcasp(void **p, void *ov, void *nv);
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|
83 |
* ulong xcasl(ulong *p, ulong ov, ulong nv);
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|
|
84 |
*/
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|
85 |
|
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|
86 |
TEXT xcas32+0(SB),0,$0
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|
87 |
TEXT xcas+0(SB),0,$0
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|
88 |
TEXT xcasp+0(SB),0,$0
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|
89 |
TEXT xcasl+0(SB),0,$0
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|
90 |
MOVL p+0(FP), CX
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|
91 |
MOVL ov+4(FP), AX /* accumulator */
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|
|
92 |
MOVL nv+8(FP), DX
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|
|
93 |
LOCK
|
|
|
94 |
CMPXCHG
|
|
|
95 |
RET
|
|
|
96 |
|
|
|
97 |
/*
|
|
|
98 |
* The CMPXCHG8B instruction also requires three operands:
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|
|
99 |
* a 64-bit value in EDX:EAX, a 64-bit value in ECX:EBX,
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|
|
100 |
* and a destination operand in memory. The instruction compar
|
|
|
101 |
* es the 64-bit value in the EDX:EAX registers with the
|
|
|
102 |
* destination operand. If they are equal, the 64-bit value
|
|
|
103 |
* in the ECX:EBX register is stored in the destination
|
|
|
104 |
* operand. If the EDX:EAX register and the destination ar
|
|
|
105 |
* e not equal, the destination is loaded in the EDX:EAX
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|
106 |
* register. The CMPXCHG8B instruction can be combined with
|
|
|
107 |
* the LOCK prefix to perform the operation atomically
|
|
|
108 |
*/
|
|
|
109 |
|
|
|
110 |
TEXT xcas64+0(SB),0,$0
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|
|
111 |
MOVL p+4(FP), DI
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|
|
112 |
MOVL ov+0x8(FP), AX
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|
|
113 |
MOVL ov+0xc(FP), DX
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|
|
114 |
MOVL nv+0x10(FP), BX
|
|
|
115 |
MOVL nv+0x14(FP), CX
|
|
|
116 |
LOCK
|
|
|
117 |
CMPXCHG64
|
|
|
118 |
MOVL .ret+0x0(FP),CX /* pointer to return value */
|
|
|
119 |
MOVL AX,0x0(CX)
|
|
|
120 |
MOVL DX,0x4(CX)
|
|
|
121 |
RET
|