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2 - 1
/* override default macros from ../port/usb.h */
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#undef	dprint
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#undef	ddprint
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#undef	deprint
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#undef	ddeprint
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#define dprint		if(ehcidebug)print
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#define ddprint		if(ehcidebug>1)print
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#define deprint		if(ehcidebug || ep->debug)print
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#define ddeprint	if(ehcidebug>1 || ep->debug>1)print
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typedef struct Ctlr Ctlr;
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typedef struct Eopio Eopio;
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typedef struct Isoio Isoio;
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typedef struct Poll Poll;
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typedef struct Qh Qh;
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typedef struct Qtree Qtree;
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#pragma incomplete Ctlr;
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#pragma incomplete Eopio;
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#pragma incomplete Isoio;
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#pragma incomplete Poll;
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#pragma incomplete Qh;
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#pragma incomplete Qtree;
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struct Poll
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{
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	Lock;
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	Rendez;
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	int	must;
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	int	does;
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};
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struct Ctlr
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{
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	Rendez;			/* for waiting to async advance doorbell */
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	Lock;			/* for ilock. qh lists and basic ctlr I/O */
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	QLock	portlck;	/* for port resets/enable... (and doorbell) */
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	int	active;		/* in use or not */
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	Ecapio*	capio;		/* Capability i/o regs */
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	Eopio*	opio;		/* Operational i/o regs */
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	int	nframes;	/* 1024, 512, or 256 frames in the list */
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	ulong*	frames;		/* periodic frame list (hw) */
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	Qh*	qhs;		/* async Qh circular list for bulk/ctl */
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	Qtree*	tree;		/* tree of Qhs for the periodic list */
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	int	ntree;		/* number of dummy qhs in tree */
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	Qh*	intrqhs;	/* list of (not dummy) qhs in tree  */
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	Isoio*	iso;		/* list of active Iso I/O */
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	ulong	load;
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	ulong	isoload;
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	int	nintr;		/* number of interrupts attended */
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	int	ntdintr;	/* number of intrs. with something to do */
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	int	nqhintr;	/* number of async td intrs. */
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	int	nisointr;	/* number of periodic td intrs. */
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	int	nreqs;
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	Poll	poll;
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};
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/*
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 * Operational registers (hw)
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 */
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struct Eopio
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{
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	ulong	cmd;		/* 00 command */
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	ulong	sts;		/* 04 status */
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	ulong	intr;		/* 08 interrupt enable */
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	ulong	frno;		/* 0c frame index */
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	ulong	seg;		/* 10 bits 63:32 of EHCI datastructs (unused) */
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	ulong	frbase;		/* 14 frame list base addr, 4096-byte boundary */
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	ulong	link;		/* 18 link for async list */
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	uchar	d2c[0x40-0x1c];	/* 1c dummy */
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	ulong	config;		/* 40 1: all ports default-routed to this HC */
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	ulong	portsc[3];	/* 44 Port status and control, one per port */
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	/* defined for omap35 ehci at least */
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	uchar	_pad0[0x80 - 0x50];
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	ulong	insn[6];	/* implementation-specific */
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};
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typedef struct Uhh Uhh;
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struct Uhh {
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	ulong	revision;	/* ro */
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	uchar	_pad0[0x10-0x4];
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	ulong	sysconfig;
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	ulong	sysstatus;	/* ro */
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	uchar	_pad1[0x40-0x18];
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	ulong	hostconfig;
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	ulong	debug_csr;
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};
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enum {
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	/* hostconfig bits */
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	P1ulpi_bypass = 1<<0,	/* utmi if set; else ulpi */
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};
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extern Ecapio *ehcidebugcapio;
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extern int ehcidebugport;
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extern int ehcidebug;
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void	ehcilinkage(Hci *hp);
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void	ehcimeminit(Ctlr *ctlr);
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void	ehcirun(Ctlr *ctlr, int on);