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WebSVN – planix.SVN – Blame – /os/branches/feature_tlsv12/sys/src/cmd/qi/run.c – Rev 2

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#include <u.h>
2 
#include <libc.h>
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#include <bio.h>
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#include <mach.h>
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#define Extern extern
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#include "power.h"
7 
 
8 
 
9 
void	lfs(ulong);
10 
void	lfd(ulong);
11 
void	stfs(ulong);
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void	stfd(ulong);
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/* indexed versions are in 31 */
14 
 
15 
void	addic(ulong);
16 
void	addiccc(ulong);
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void	addi(ulong);
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void	addis(ulong);
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void	andicc(ulong);
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void	andiscc(ulong);
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void	bcx(ulong);
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void	bx(ulong);
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void	cmpi(ulong);
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void	cmpli(ulong);
25 
void	lbz(ulong);
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void	lha(ulong);
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void	lhz(ulong);
28 
void	lmw(ulong);
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void	lwz(ulong);
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void	mulli(ulong);
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void	ori(ulong);
32 
void	oris(ulong);
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void	rlwimi(ulong);
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void	rlwinm(ulong);
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void	rlwnm(ulong);
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void	sc(ulong);
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void	stb(ulong);
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void	sth(ulong);
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void	stmw(ulong);
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void	stw(ulong);
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void	subfic(ulong);
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void	twi(ulong);
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void	xori(ulong);
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void	xoris(ulong);
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46 
Inst	op0[] = {
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[3] {twi, "twi", Ibranch},
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[7] {mulli, "mulli", Iarith},
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[8] {subfic, "subfic", Iarith},
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[10] {cmpli, "cmpli", Iarith},
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[11] {cmpi, "cmpi", Iarith},
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[12] {addic, "addic", Iarith},
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[13] {addiccc, "addic.", Iarith},
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[14] {addi, "addi", Iarith},
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[15] {addis, "addis", Iarith},
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[16] {bcx, "bc⋯", Ibranch},
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[17] {sc, "sc", Isyscall},
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[18] {bx, "b⋯", Ibranch},
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/* group 19; branch unit */
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[20] {rlwimi, "rlwimi", Ilog},
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[21] {rlwinm, "rlwinm", Ilog},
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[23] {rlwnm, "rlwnm", Ilog},
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[24] {ori, "ori", Ilog},
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[25] {oris, "oris", Ilog},
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[26] {xori, "xori", Ilog},
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[27] {xoris, "xoris", Ilog},
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[28] {andicc, "andi.", Ilog},
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[29] {andiscc, "andis.", Ilog},
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/* group 31; integer & misc. */
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[32] {lwz, "lwz", Iload},
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[33] {lwz, "lwzu", Iload},
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[34] {lbz, "lbz", Iload},
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[35] {lbz, "lbzu", Iload},
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[36] {stw, "stw", Istore},
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[37] {stw, "stwu", Istore},
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[38] {stb, "stb", Istore},
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[39] {stb, "stbu", Istore},
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[40] {lhz, "lhz", Iload},
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[41] {lhz, "lhzu", Iload},
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[42] {lha, "lha", Iload},
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[43] {lha, "lhau", Iload},
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[44] {sth, "sth", Istore},
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[45] {sth, "sthu", Istore},
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[46] {lmw, "lmw", Iload},
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[47] {stmw, "stmw", Istore},
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[48] {lfs, "lfs", Iload},
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[49] {lfs, "lfsu", Iload},
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[50] {lfd, "lfd", Iload},
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[51] {lfd, "lfdu", Iload},
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[52] {stfs, "stfs", Istore},
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[53] {stfs, "stfsu", Istore},
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[54] {stfd, "stfd", Istore},
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[55] {stfd, "stfdu", Istore},
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/* group 59; single precision floating point */
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/* group 63; double precision floating point; fpscr */
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	{0, 0, 0},
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};
98 
 
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Inset	ops0 = {op0, nelem(op0)-1};
100 
 
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static	char	oemflag[] = {
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	[104] 1,
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	[10] 1,
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	[136] 1,
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	[138] 1,
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	[200] 1,
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	[202] 1,
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	[232] 1,
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	[234] 1,
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	[235] 1,
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	[266] 1,
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	[40] 1,
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	[459] 1,
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	[491] 1,
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	[8] 1,
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};
117 
 
118 
 
119 
void
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run(void)
121 
{
122 
	int xo, f;
123 
 
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	do {
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		reg.ir = ifetch(reg.pc);
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		ci = 0;
127 
		switch(reg.ir>>26) {
128 
		default:
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			xo = reg.ir>>26;
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			if(xo >= nelem(op0))
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				break;
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			ci = &op0[xo];
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			break;
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		case 19:
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			xo = getxo(reg.ir);
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			if(xo >= ops19.nel)
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				break;
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			ci = &ops19.tab[xo];
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			break;
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		case 31:
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			xo = getxo(reg.ir);
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			f = xo & ~getxo(OE);
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			if(reg.ir&OE && f < sizeof(oemflag) && oemflag[f])
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				xo = f;
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			if(xo >= ops31.nel)
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				break;
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			ci = &ops31.tab[xo];
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			break;
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		case 59:
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			xo = getxo(reg.ir) & 0x1F;
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			if(xo >= ops59.nel)
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				break;
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			ci = &ops59.tab[xo];
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			break;
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		case 63:
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			xo = getxo(reg.ir) & 0x1F;
157 
			if(xo < ops63a.nel) {
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				ci = &ops63a.tab[xo];
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				if(ci->func || ci->name)
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					break;
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				ci = 0;
162 
			}
163 
			xo = getxo(reg.ir);
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			if(xo >= ops63b.nel)
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				break;
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			ci = &ops63b.tab[xo];
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			break;
168 
		}
169 
		if(ci && ci->func){
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			ci->count++;
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			(*ci->func)(reg.ir);
172 
		} else {
173 
			if(ci && ci->name && trace)
174 
				itrace("%s\t[not yet done]", ci->name);
175 
			else
176 
				undef(reg.ir);
177 
		}
178 
		reg.pc += 4;
179 
		if(bplist)
180 
			brkchk(reg.pc, Instruction);
181 
	}while(--count);
182 
}
183 
 
184 
void
185 
ilock(int)
186 
{
187 
}
188 
 
189 
void
190 
undef(ulong ir)
191 
{
192 
/*	Bprint(bioout, "op=%d op2=%d op3=%d\n", ir>>30, (ir>>21)&0x7, (ir>>19)&0x3f); */
193 
	Bprint(bioout, "illegal_instruction IR #%.8lux (op=%ld/%ld, pc=#%.8lux)\n", ir, getop(ir), getxo(ir), reg.pc);
194 
	if(ci && ci->name && ci->func==0)
195 
		Bprint(bioout, "(%s not yet implemented)\n", ci->name);
196 
	longjmp(errjmp, 0);
197 
}
198 
 
199 
void
200 
unimp(ulong ir)
201 
{
202 
/*	Bprint(bioout, "op=%d op2=%d op3=%d\n", ir>>30, (ir>>21)&0x7, (ir>>19)&0x3f); */
203 
	Bprint(bioout, "illegal_instruction IR #%.8lux (op=%ld/%ld, pc=#%.8lux) %s not in MPC601\n", ir, getop(ir), getxo(ir), reg.pc, ci->name?ci->name: "-");
204 
	longjmp(errjmp, 0);
205 
}