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/*
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* Memory and machine-specific definitions. Used in C and assembler.
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*/
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#define KiB 1024u /* Kibi 0x0000000000000400 */
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#define MiB 1048576u /* Mebi 0x0000000000100000 */
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#define GiB 1073741824u /* Gibi 000000000040000000 */
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/*
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* Not sure where these macros should go.
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* This probably isn't right but will do for now.
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* The macro names are problematic too.
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*/
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/*
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* In BITN(o), 'o' is the bit offset in the register.
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* For multi-bit fields use F(v, o, w) where 'v' is the value
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* of the bit-field of width 'w' with LSb at bit offset 'o'.
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*/
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#define BITN(o) (1<<(o))
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#define F(v, o, w) (((v) & ((1<<(w))-1))<<(o))
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/*
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* Sizes
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*/
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#define BY2PG (4*KiB) /* bytes per page */
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#define PGSHIFT 12 /* log(BY2PG) */
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#define MAXMACH 1 /* max # cpus system can run */
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#define MACHSIZE BY2PG
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#define KSTKSIZE (8*KiB)
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#define STACKALIGN(sp) ((sp) & ~3) /* bug: assure with alloc */
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/*
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* Address spaces.
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* KTZERO is used by kprof and dumpstack (if any).
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*
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* KZERO is mapped to physical 0.
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* u-boot claims to take 0 - 8MB.
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*
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* vectors are at 0, plan9.ini is at KZERO+4K and is limited to 16K by
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* devenv. L2 PTEs for trap vectors & i/o regs are stored from KZERO+56K
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* to L1-MACHSIZE (KZERO+60K). cpu0's Mach struct is at L1 - MACHSIZE(4K)
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* to L1 (KZERO+60K to KZERO+64K). L1 PTEs are stored from L1 to L1+32K
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* (KZERO+64K to KZERO+96K). KTZERO may be anywhere after KZERO+96K.
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*/
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#define KSEG0 0x60000000 /* kernel segment */
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/* mask to check segment; good for 512MB dram */
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#define KSEGM 0xE0000000
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#define KZERO KSEG0 /* kernel address space */
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#define CONFADDR (KZERO+4*KiB) /* unparsed plan9.ini */
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#define L1 (KZERO+64*KiB) /* tt ptes: 16KiB aligned */
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#define KTZERO (KZERO+0x800000) /* kernel text start */
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#define UZERO 0 /* user segment */
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#define UTZERO (UZERO+BY2PG) /* user text start */
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#define UTROUND(t) ROUNDUP((t), BY2PG)
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#define USTKTOP KZERO /* user segment end +1 */
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#define USTKSIZE (8*1024*1024) /* user stack size */
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#define TSTKTOP (USTKTOP-USTKSIZE) /* sysexec temporary stack */
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#define TSTKSIZ 256
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/* address at which to copy and execute rebootcode */
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#define REBOOTADDR KADDR(0x100)
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/*
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* Time.
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* Does this need to be here? Used in assembler?
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*/
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#define HZ 100 /* clock frequency */
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#define MS2HZ (1000/HZ) /* millisec per clock tick */
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#define TK2SEC(t) ((t)/HZ) /* ticks to seconds */
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/*
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* More accurate time
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*/
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#define CLOCKFREQ (200*1000*1000) /* TCLK on sheeva: 200MHz */
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//#define MS2TMR(t) ((ulong)(((uvlong)(t)*CLOCKFREQ)/1000))
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//#define US2TMR(t) ((ulong)(((uvlong)(t)*CLOCKFREQ)/1000000))
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/*
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* Legacy...
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*/
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#define BLOCKALIGN 32 /* only used in allocb.c */
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#define KSTACK KSTKSIZE
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/*
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* Sizes
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*/
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#define BI2BY 8 /* bits per byte */
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#define BY2SE 4
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#define BY2WD 4
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#define BY2V 8 /* only used in xalloc.c */
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#define CACHELINESZ 32
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#define PTEMAPMEM (1024*1024)
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#define PTEPERTAB (PTEMAPMEM/BY2PG)
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#define SEGMAPSIZE 1984
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#define SSEGMAPSIZE 16
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#define PPN(x) ((x)&~(BY2PG-1))
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/*
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* With a little work these move to port.
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*/
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#define PTEVALID (1<<0)
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#define PTERONLY 0
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#define PTEWRITE (1<<1)
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#define PTEUNCACHED (1<<2)
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#define PTEKERNEL (1<<3)
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/*
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* Physical machine information from here on.
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*/
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#define PHYSDRAM 0
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/* from 0x80000000 up is uncached by L2 (see archkw.c) */
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#define PHYSCESASRAM 0xc8010000
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#define PHYSNAND2 0xd8000000 /* guru */
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#define PHYSSPIFLASH 0xe8000000 /* optional spi flash (dream) */
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/* this address is configured by u-boot, and is 0xd0000000 at reset */
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#define PHYSIO 0xf1000000 /* internal registers */
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#define PHYSCONS (PHYSIO + 0x12000) /* uart */
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#define PHYSNAND1 0xf9000000 /* sheeva/openrd (remapped) */
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#define PHYSBOOTROM 0xffff0000 /* boot rom */
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#define VIRTIO PHYSIO
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