| 2 |
- |
1 |
typedef struct Flash Flash;
|
|
|
2 |
typedef struct Flashchip Flashchip;
|
|
|
3 |
typedef struct Flashpart Flashpart;
|
|
|
4 |
typedef struct Flashregion Flashregion;
|
|
|
5 |
|
|
|
6 |
/*
|
|
|
7 |
* logical partitions
|
|
|
8 |
*/
|
|
|
9 |
enum {
|
|
|
10 |
Maxflashpart = 8
|
|
|
11 |
};
|
|
|
12 |
|
|
|
13 |
struct Flashpart {
|
|
|
14 |
char* name;
|
|
|
15 |
ulong start;
|
|
|
16 |
ulong end;
|
|
|
17 |
};
|
|
|
18 |
|
|
|
19 |
enum {
|
|
|
20 |
Maxflashregion = 4
|
|
|
21 |
};
|
|
|
22 |
|
|
|
23 |
/*
|
|
|
24 |
* physical erase block regions
|
|
|
25 |
*/
|
|
|
26 |
struct Flashregion {
|
|
|
27 |
int n; /* number of blocks in region */
|
|
|
28 |
ulong start; /* physical base address (allowing for banks) */
|
|
|
29 |
ulong end;
|
|
|
30 |
ulong erasesize;
|
|
|
31 |
ulong eraseshift; /* log2(erasesize) */
|
|
|
32 |
ulong pagesize; /* if non-0, size of pages within erase block */
|
|
|
33 |
ulong pageshift; /* log2(pagesize) */
|
|
|
34 |
ulong spares; /* spare bytes per page, for ecc, etc. */
|
|
|
35 |
};
|
|
|
36 |
|
|
|
37 |
/*
|
|
|
38 |
* one of a set of chips in a given region
|
|
|
39 |
*/
|
|
|
40 |
struct Flashchip {
|
|
|
41 |
int nr;
|
|
|
42 |
Flashregion regions[Maxflashregion];
|
|
|
43 |
|
|
|
44 |
uchar id; /* flash manufacturer ID */
|
|
|
45 |
ushort devid; /* flash device ID */
|
|
|
46 |
int width; /* bytes per flash line */
|
|
|
47 |
int maxwb; /* max write buffer size */
|
|
|
48 |
ulong devsize; /* physical device size */
|
|
|
49 |
int alg; /* programming algorithm (if CFI) */
|
|
|
50 |
int protect; /* software protection */
|
|
|
51 |
};
|
|
|
52 |
|
|
|
53 |
/*
|
|
|
54 |
* structure defining a contiguous region of flash memory
|
|
|
55 |
*/
|
|
|
56 |
struct Flash {
|
|
|
57 |
QLock; /* interlock on flash operations */
|
|
|
58 |
Flash* next;
|
|
|
59 |
|
|
|
60 |
/* following are filled in before calling Flash.reset */
|
|
|
61 |
char* type;
|
|
|
62 |
void* addr;
|
|
|
63 |
ulong size;
|
|
|
64 |
int xip; /* executing in place: don't query */
|
|
|
65 |
int (*reset)(Flash*);
|
|
|
66 |
|
|
|
67 |
/* following are filled in by the reset routine */
|
|
|
68 |
int (*eraseall)(Flash*);
|
|
|
69 |
int (*erasezone)(Flash*, Flashregion*, ulong);
|
|
|
70 |
/* (optional) reads of correct width and alignment */
|
|
|
71 |
int (*read)(Flash*, ulong, void*, long);
|
|
|
72 |
/* writes of correct width and alignment */
|
|
|
73 |
int (*write)(Flash*, ulong, void*, long);
|
|
|
74 |
int (*suspend)(Flash*);
|
|
|
75 |
int (*resume)(Flash*);
|
|
|
76 |
int (*attach)(Flash*);
|
|
|
77 |
|
|
|
78 |
/* following might be filled in by either archflashreset or reset routine */
|
|
|
79 |
int nr;
|
|
|
80 |
Flashregion regions[Maxflashregion];
|
|
|
81 |
|
|
|
82 |
uchar id; /* flash manufacturer ID */
|
|
|
83 |
ushort devid; /* flash device ID */
|
|
|
84 |
int width; /* bytes per flash line */
|
|
|
85 |
int interleave; /* addresses are interleaved across set of chips */
|
|
|
86 |
int bshift; /* byte addresses are shifted */
|
|
|
87 |
ulong cmask; /* command mask for interleaving */
|
|
|
88 |
int maxwb; /* max write buffer size */
|
|
|
89 |
ulong devsize; /* physical device size */
|
|
|
90 |
int alg; /* programming algorithm (if CFI) */
|
|
|
91 |
void* data; /* flash type routines' private storage, or nil */
|
|
|
92 |
Flashpart part[Maxflashpart]; /* logical partitions */
|
|
|
93 |
int protect; /* software protection */
|
|
|
94 |
char* sort; /* "nand", "nor", "serial", nil (unspecified) */
|
|
|
95 |
};
|
|
|
96 |
|
|
|
97 |
/*
|
|
|
98 |
* called by link routine of driver for specific flash type: arguments are
|
|
|
99 |
* conventional name for card type/model, and card driver's reset routine.
|
|
|
100 |
*/
|
|
|
101 |
void addflashcard(char*, int (*)(Flash*));
|
|
|
102 |
|
|
|
103 |
/*
|
|
|
104 |
* called by devflash.c:/^flashreset; if flash exists,
|
|
|
105 |
* sets type, address, and size in bytes of flash
|
|
|
106 |
* and returns 0; returns -1 if flash doesn't exist
|
|
|
107 |
*/
|
|
|
108 |
int archflashreset(int, Flash*);
|
|
|
109 |
|
|
|
110 |
/*
|
|
|
111 |
* enable/disable write protect
|
|
|
112 |
*/
|
|
|
113 |
void archflashwp(Flash*, int);
|
|
|
114 |
|
|
|
115 |
/*
|
|
|
116 |
* flash access taking width and interleave into account
|
|
|
117 |
*/
|
|
|
118 |
int flashget(Flash*, ulong);
|
|
|
119 |
void flashput(Flash*, ulong, int);
|
|
|
120 |
|
|
|
121 |
/*
|
|
|
122 |
* Architecture specific routines for managing nand devices
|
|
|
123 |
*/
|
|
|
124 |
|
|
|
125 |
/*
|
|
|
126 |
* do any device spcific initialisation
|
|
|
127 |
*/
|
|
|
128 |
void archnand_init(Flash*);
|
|
|
129 |
|
|
|
130 |
/*
|
|
|
131 |
* if claim is 1, claim device exclusively, and enable it (power it up)
|
|
|
132 |
* if claim is 0, release, and disable it (power it down)
|
|
|
133 |
* claiming may be as simple as a qlock per device
|
|
|
134 |
*/
|
|
|
135 |
void archnand_claim(Flash*, int claim);
|
|
|
136 |
|
|
|
137 |
/*
|
|
|
138 |
* set command latch enable (CLE) and address latch enable (ALE)
|
|
|
139 |
* appropriately
|
|
|
140 |
*/
|
|
|
141 |
void archnand_setCLEandALE(Flash*, int cle, int ale);
|
|
|
142 |
|
|
|
143 |
/*
|
|
|
144 |
* write a sequence of bytes to the device
|
|
|
145 |
*/
|
|
|
146 |
void archnand_write(Flash*, void *buf, int len);
|
|
|
147 |
|
|
|
148 |
/*
|
|
|
149 |
* read a sequence of bytes from the device
|
|
|
150 |
* if buf is 0, throw away the data
|
|
|
151 |
*/
|
|
|
152 |
void archnand_read(Flash*, void *buf, int len);
|