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2 - 1
#define	NSNAME	8
2
#define	NSYM	50
3
#define	NREG	32
4
 
5
#define NOPROF	(1<<0)
6
#define DUPOK	(1<<1)
7
 
8
enum
9
{
10
	REGZERO		= 0,	/* set to zero */
11
	REGSP		= 1,
12
	REGSB		= 2,
13
	REGRET		= 3,
14
	REGARG		= 3,
15
	REGMIN		= 7,	/* register variables allocated from here to REGMAX */
16
	REGMAX		= 27,
17
	REGEXT		= 30,	/* external registers allocated from here down */
18
	REGTMP		= 31,	/* used by the linker */
19
 
20
	FREGRET		= 0,
21
	FREGMIN		= 17,	/* first register variable */
22
	FREGEXT		= 26,	/* first external register */
23
	FREGCVI		= 27, /* floating conversion constant */
24
	FREGZERO	= 28,	/* both float and double */
25
	FREGHALF	= 29,	/* double */
26
	FREGONE		= 30,	/* double */
27
	FREGTWO		= 31	/* double */
28
/*
29
 * GENERAL:
30
 *
31
 * compiler allocates R3 up as temps
32
 * compiler allocates register variables R7-R27
33
 * compiler allocates external registers R30 down
34
 *
35
 * compiler allocates register variables F17-F26
36
 * compiler allocates external registers F26 down
37
 */
38
};
39
 
40
enum	as
41
{
42
	AXXX	= 0,
43
	AADD,
44
	AADDCC,
45
	AADDV,
46
	AADDVCC,
47
	AADDC,
48
	AADDCCC,
49
	AADDCV,
50
	AADDCVCC,
51
	AADDME,
52
	AADDMECC,
53
	AADDMEVCC,
54
	AADDMEV,
55
	AADDE,
56
	AADDECC,
57
	AADDEVCC,
58
	AADDEV,
59
	AADDZE,
60
	AADDZECC,
61
	AADDZEVCC,
62
	AADDZEV,
63
	AAND,
64
	AANDCC,
65
	AANDN,
66
	AANDNCC,
67
	ABC,
68
	ABCL,
69
	ABEQ,
70
	ABGE,
71
	ABGT,
72
	ABL,
73
	ABLE,
74
	ABLT,
75
	ABNE,
76
	ABR,
77
	ABVC,
78
	ABVS,
79
	ACMP,
80
	ACMPU,
81
	ACNTLZW,
82
	ACNTLZWCC,
83
	ACRAND,
84
	ACRANDN,
85
	ACREQV,
86
	ACRNAND,
87
	ACRNOR,
88
	ACROR,
89
	ACRORN,
90
	ACRXOR,
91
	ADIVW,
92
	ADIVWCC,
93
	ADIVWVCC,
94
	ADIVWV,
95
	ADIVWU,
96
	ADIVWUCC,
97
	ADIVWUVCC,
98
	ADIVWUV,
99
	AEQV,
100
	AEQVCC,
101
	AEXTSB,
102
	AEXTSBCC,
103
	AEXTSH,
104
	AEXTSHCC,
105
	AFABS,
106
	AFABSCC,
107
	AFADD,
108
	AFADDCC,
109
	AFADDS,
110
	AFADDSCC,
111
	AFCMPO,
112
	AFCMPU,
113
	AFCTIW,
114
	AFCTIWCC,
115
	AFCTIWZ,
116
	AFCTIWZCC,
117
	AFDIV,
118
	AFDIVCC,
119
	AFDIVS,
120
	AFDIVSCC,
121
	AFMADD,
122
	AFMADDCC,
123
	AFMADDS,
124
	AFMADDSCC,
125
	AFMOVD,
126
	AFMOVDCC,
127
	AFMOVDU,
128
	AFMOVS,
129
	AFMOVSU,
130
	AFMSUB,
131
	AFMSUBCC,
132
	AFMSUBS,
133
	AFMSUBSCC,
134
	AFMUL,
135
	AFMULCC,
136
	AFMULS,
137
	AFMULSCC,
138
	AFNABS,
139
	AFNABSCC,
140
	AFNEG,
141
	AFNEGCC,
142
	AFNMADD,
143
	AFNMADDCC,
144
	AFNMADDS,
145
	AFNMADDSCC,
146
	AFNMSUB,
147
	AFNMSUBCC,
148
	AFNMSUBS,
149
	AFNMSUBSCC,
150
	AFRSP,
151
	AFRSPCC,
152
	AFSUB,
153
	AFSUBCC,
154
	AFSUBS,
155
	AFSUBSCC,
156
	AMOVMW,
157
	ALSW,
158
	ALWAR,
159
	AMOVWBR,
160
	AMOVB,
161
	AMOVBU,
162
	AMOVBZ,
163
	AMOVBZU,
164
	AMOVH,
165
	AMOVHBR,
166
	AMOVHU,
167
	AMOVHZ,
168
	AMOVHZU,
169
	AMOVW,
170
	AMOVWU,
171
	AMOVFL,
172
	AMOVCRFS,
173
	AMTFSB0,
174
	AMTFSB0CC,
175
	AMTFSB1,
176
	AMTFSB1CC,
177
	AMULHW,
178
	AMULHWCC,
179
	AMULHWU,
180
	AMULHWUCC,
181
	AMULLW,
182
	AMULLWCC,
183
	AMULLWVCC,
184
	AMULLWV,
185
	ANAND,
186
	ANANDCC,
187
	ANEG,
188
	ANEGCC,
189
	ANEGVCC,
190
	ANEGV,
191
	ANOR,
192
	ANORCC,
193
	AOR,
194
	AORCC,
195
	AORN,
196
	AORNCC,
197
	AREM,
198
	AREMCC,
199
	AREMV,
200
	AREMVCC,
201
	AREMU,
202
	AREMUCC,
203
	AREMUV,
204
	AREMUVCC,
205
	ARFI,
206
	ARLWMI,
207
	ARLWMICC,
208
	ARLWNM,
209
	ARLWNMCC,
210
	ASLW,
211
	ASLWCC,
212
	ASRW,
213
	ASRAW,
214
	ASRAWCC,
215
	ASRWCC,
216
	ASTSW,
217
	ASTWCCC,
218
	ASUB,
219
	ASUBCC,
220
	ASUBVCC,
221
	ASUBC,
222
	ASUBCCC,
223
	ASUBCV,
224
	ASUBCVCC,
225
	ASUBME,
226
	ASUBMECC,
227
	ASUBMEVCC,
228
	ASUBMEV,
229
	ASUBV,
230
	ASUBE,
231
	ASUBECC,
232
	ASUBEV,
233
	ASUBEVCC,
234
	ASUBZE,
235
	ASUBZECC,
236
	ASUBZEVCC,
237
	ASUBZEV,
238
	ASYNC,
239
	AXOR,
240
	AXORCC,
241
 
242
	ADCBF,
243
	ADCBI,
244
	ADCBST,
245
	ADCBT,
246
	ADCBTST,
247
	ADCBZ,
248
	AECIWX,
249
	AECOWX,
250
	AEIEIO,
251
	AICBI,
252
	AISYNC,
253
	ATLBIE,
254
	ATW,
255
 
256
	ASYSCALL,
257
	ADATA,
258
	AGLOBL,
259
	AGOK,
260
	AHISTORY,
261
	ANAME,
262
	ANOP,
263
	ARETURN,
264
	ATEXT,
265
	AWORD,
266
	AEND,
267
	ADYNT,
268
	AINIT,
269
	ASIGNAME,
270
 
271
	/* IBM powerpc embedded; not portable */
272
	AMACCHW,
273
	AMACCHWCC,
274
	AMACCHWS,
275
	AMACCHWSCC,
276
	AMACCHWSU,
277
	AMACCHWSUCC,
278
	AMACCHWSUV,
279
	AMACCHWSUVCC,
280
	AMACCHWSV,
281
	AMACCHWSVCC,
282
	AMACCHWU,
283
	AMACCHWUCC,
284
	AMACCHWUV,
285
	AMACCHWUVCC,
286
	AMACCHWV,
287
	AMACCHWVCC,
288
	AMACHHW,
289
	AMACHHWCC,
290
	AMACHHWV,
291
	AMACHHWVCC,
292
	AMACHHWS,
293
	AMACHHWSCC,
294
	AMACHHWSV,
295
	AMACHHWSVCC,
296
	AMACHHWSU,
297
	AMACHHWSUCC,
298
	AMACHHWSUV,
299
	AMACHHWSUVCC,
300
	AMACHHWU,
301
	AMACHHWUCC,
302
	AMACHHWUV,
303
	AMACHHWUVCC,
304
	AMACLHW,
305
	AMACLHWCC,
306
	AMACLHWS,
307
	AMACLHWSCC,
308
	AMACLHWSU,
309
	AMACLHWSUCC,
310
	AMACLHWSUV,
311
	AMACLHWSUVCC,
312
	AMACLHWSV,
313
	AMACLHWSVCC,
314
	AMACLHWU,
315
	AMACLHWUCC,
316
	AMACLHWUV,
317
	AMACLHWUVCC,
318
	AMACLHWV,
319
	AMACLHWVCC,
320
	AMULCHW,
321
	AMULCHWCC,
322
	AMULCHWU,
323
	AMULCHWUCC,
324
	AMULHHW,
325
	AMULHHWCC,
326
	AMULHHWU,
327
	AMULHHWUCC,
328
	AMULLHW,
329
	AMULLHWCC,
330
	AMULLHWU,
331
	AMULLHWUCC,
332
	ANMACCHW,
333
	ANMACCHWCC,
334
	ANMACCHWS,
335
	ANMACCHWSCC,
336
	ANMACCHWSV,
337
	ANMACCHWSVCC,
338
	ANMACCHWV,
339
	ANMACCHWVCC,
340
	ANMACHHW,
341
	ANMACHHWCC,
342
	ANMACHHWS,
343
	ANMACHHWSCC,
344
	ANMACHHWSV,
345
	ANMACHHWSVCC,
346
	ANMACHHWV,
347
	ANMACHHWVCC,
348
	ANMACLHW,
349
	ANMACLHWCC,
350
	ANMACLHWS,
351
	ANMACLHWSCC,
352
	ANMACLHWSV,
353
	ANMACLHWSVCC,
354
	ANMACLHWV,
355
	ANMACLHWVCC,
356
 
357
	ARFCI,
358
 
359
	/* optional on 32-bit */
360
	AFRES,
361
	AFRESCC,
362
	AFRSQRTE,
363
	AFRSQRTECC,
364
	AFSEL,
365
	AFSELCC,
366
	AFSQRT,
367
	AFSQRTCC,
368
	AFSQRTS,
369
	AFSQRTSCC,
370
 
371
	/* parallel, cross, and secondary */
372
	AFPSEL,
373
	AFPMUL,
374
	AFXMUL,
375
	AFXPMUL,
376
	AFXSMUL,
377
	AFPADD,
378
	AFPSUB,
379
	AFPRE,
380
	AFPRSQRTE,
381
	AFPMADD,
382
	AFXMADD,
383
	AFXCPMADD,
384
	AFXCSMADD,
385
	AFPNMADD,
386
	AFXNMADD,
387
	AFXCPNMADD,
388
	AFXCSNMADD,
389
	AFPMSUB,
390
	AFXMSUB,
391
	AFXCPMSUB,
392
	AFXCSMSUB,
393
	AFPNMSUB,
394
	AFXNMSUB,
395
	AFXCPNMSUB,
396
	AFXCSNMSUB,
397
	AFPABS,
398
	AFPNEG,
399
	AFPRSP,
400
	AFPNABS,
401
	AFSCMP,
402
	AFSABS,
403
	AFSNEG,
404
	AFSNABS,
405
	AFPCTIW,
406
	AFPCTIWZ,
407
	AFMOVSPD,
408
	AFMOVPSD,
409
	AFXCPNPMA,
410
	AFXCSNPMA,
411
	AFXCPNSMA,
412
	AFXCSNSMA,
413
	AFXCXNPMA,
414
	AFXCXNSMA,
415
	AFXCXMA,
416
	AFXCXNMS,
417
 
418
	/* parallel, cross, and secondary load and store */
419
	AFSMOVS,
420
	AFSMOVSU,
421
	AFSMOVD,
422
	AFSMOVDU,
423
	AFXMOVS,
424
	AFXMOVSU,
425
	AFXMOVD,
426
	AFXMOVDU,
427
	AFPMOVS,
428
	AFPMOVSU,
429
	AFPMOVD,
430
	AFPMOVDU,
431
	AFPMOVIW,
432
 
433
	ALAST
434
};
435
 
436
/* type/name */
437
enum
438
{
439
	D_GOK	= 0,
440
	D_NONE,
441
 
442
/* name */
443
	D_EXTERN,
444
	D_STATIC,
445
	D_AUTO,
446
	D_PARAM,
447
 
448
/* type */
449
	D_BRANCH,
450
	D_OREG,
451
	D_CONST,
452
	D_FCONST,
453
	D_SCONST,
454
	D_REG,
455
	D_FPSCR,
456
	D_MSR,
457
	D_FREG,
458
	D_CREG,
459
	D_SPR,
460
	D_SREG,	/* segment register */
461
	D_OPT,	/* branch/trap option */
462
	D_FILE,
463
	D_FILE1,
464
	D_DCR,	/* device control register */
465
 
466
/* reg names iff type is D_SPR */
467
	D_XER	= 1,
468
	D_LR	= 8,
469
	D_CTR	= 9
470
	/* and many supervisor level registers */
471
};
472
 
473
/*
474
 * this is the ranlib header
475
 */
476
#define	SYMDEF	"__.SYMDEF"
477
 
478
/*
479
 * this is the simulated IEEE floating point
480
 */
481
typedef	struct	ieee	Ieee;
482
struct	ieee
483
{
484
	long	l;	/* contains ls-man	0xffffffff */
485
	long	h;	/* contains sign	0x80000000
486
				    exp		0x7ff00000
487
				    ms-man	0x000fffff */
488
};