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#include "mem.h"
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#include "/sys/src/boot/pc/x16.h"
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#undef DELAY
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#define PADDR(a) ((a) & ~KZERO)
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#define KADDR(a) (KZERO|(a))
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/*
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* Some machine instructions not handled by 8[al].
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*/
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#define OP16 BYTE $0x66
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#define DELAY BYTE $0xEB; BYTE $0x00 /* JMP .+2 */
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#define CPUID BYTE $0x0F; BYTE $0xA2 /* CPUID, argument in AX */
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#define WRMSR BYTE $0x0F; BYTE $0x30 /* WRMSR, argument in AX/DX (lo/hi) */
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#define RDTSC BYTE $0x0F; BYTE $0x31 /* RDTSC, result in AX/DX (lo/hi) */
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#define RDMSR BYTE $0x0F; BYTE $0x32 /* RDMSR, result in AX/DX (lo/hi) */
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#define HLT BYTE $0xF4
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#define INVLPG BYTE $0x0F; BYTE $0x01; BYTE $0x39 /* INVLPG (%ecx) */
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#define WBINVD BYTE $0x0F; BYTE $0x09
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/*
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* Macros for calculating offsets within the page directory base
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* and page tables. Note that these are assembler-specific hence
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* the '<<2'.
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*/
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#define PDO(a) (((((a))>>22) & 0x03FF)<<2)
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#define PTO(a) (((((a))>>12) & 0x03FF)<<2)
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TEXT m0rgdtptr(SB), $0
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WORD $(NGDT*8-1)
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LONG $(CPU0GDT-KZERO)
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TEXT m0gdtptr(SB), $0
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WORD $(NGDT*8-1)
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LONG $CPU0GDT
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TEXT m0idtptr(SB), $0
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WORD $(256*8-1)
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LONG $IDTADDR
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/*
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* Save registers.
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*/
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TEXT saveregs(SB), $0
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/* appease 8l */
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SUBL $32, SP
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POPL AX
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POPL AX
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POPL AX
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POPL AX
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POPL AX
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POPL AX
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POPL AX
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POPL AX
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PUSHL AX
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PUSHL BX
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PUSHL CX
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PUSHL DX
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PUSHL BP
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PUSHL DI
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PUSHL SI
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PUSHFL
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XCHGL 32(SP), AX /* swap return PC and saved flags */
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XCHGL 0(SP), AX
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XCHGL 32(SP), AX
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RET
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TEXT restoreregs(SB), $0
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/* appease 8l */
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PUSHL AX
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PUSHL AX
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PUSHL AX
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PUSHL AX
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PUSHL AX
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PUSHL AX
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PUSHL AX
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PUSHL AX
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ADDL $32, SP
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XCHGL 32(SP), AX /* swap return PC and saved flags */
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XCHGL 0(SP), AX
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XCHGL 32(SP), AX
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POPFL
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POPL SI
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POPL DI
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POPL BP
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POPL DX
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POPL CX
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POPL BX
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POPL AX
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RET
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/*
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* Assumed to be in protected mode at time of call.
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* Switch to real mode, execute an interrupt, and
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* then switch back to protected mode.
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*
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* Assumes:
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* - no device interrupts are going to come in
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* - 0-16MB is identity mapped in page tables
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* - l.s real-mode code is in low memory already but
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* may need to be copied into the first 64K (if loaded by pbs)
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* - can use code segment rmseg in real mode to get at l.s code
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* - the above Chinese puzzle pretty much forces RMUADDR to be 0x8000 or 0
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* and rmseg to be 0x800 or 0.
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*/
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TEXT realmodeidtptr(SB), $0
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WORD $(4*256-1)
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LONG $0
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TEXT realmode0(SB), $0
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CALL saveregs(SB)
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/* switch to low code address */
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LEAL physcode-KZERO(SB), AX
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JMP *AX
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TEXT physcode(SB), $0
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/* switch to low stack */
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MOVL SP, AX
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MOVL $RMSTACK, SP
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PUSHL AX
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/* paranoia: make sure modified INT & JMPFAR instr.s are seen below */
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BYTE $0x0f; BYTE $0xae; BYTE $0xf8 /* SFENCE */
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BYTE $0x0f; BYTE $0xae; BYTE $0xe8 /* LFENCE */
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BYTE $0x0f; BYTE $0xae; BYTE $0xf0 /* MFENCE */
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/* change gdt to physical pointer */
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MOVL m0rgdtptr-KZERO(SB), GDTR
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/* load IDT with real-mode version*/
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MOVL realmodeidtptr-KZERO(SB), IDTR
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/* disable paging */
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MOVL CR0, AX
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ANDL $(~PG), AX
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MOVL AX, CR0
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/* JMP .+2 to clear prefetch queue*/
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BYTE $0xEB; BYTE $0x00
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/* jump to 16-bit code segment */
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/* JMPFAR SELECTOR(KESEG16, SELGDT, 0):$again16bit(SB) /**/
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BYTE $0xEA
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LONG $again16bit-KZERO(SB)
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WORD $SELECTOR(KESEG16, SELGDT, 0)
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TEXT again16bit(SB), $0
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/*
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* Now in 16-bit compatibility mode.
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* These are 32-bit instructions being interpreted
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* as 16-bit instructions. I'm being lazy and
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* not using the macros because I know when
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* the 16- and 32-bit instructions look the same
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* or close enough.
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*/
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/* disable protected mode and jump to real mode cs */
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OPSIZE; MOVL CR0, AX
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OPSIZE; XORL BX, BX
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OPSIZE; INCL BX
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OPSIZE; XORL BX, AX
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OPSIZE; MOVL AX, CR0
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/* JMPFAR rmseg:now16real */
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BYTE $0xEA
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WORD $now16real-KZERO(SB)
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TEXT rmseg(SB), $0
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WORD $0
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TEXT now16real(SB), $0
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/* copy the registers for the bios call */
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CLR(rAX)
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MTSR(rAX, rSS) /* 0000 -> rSS */
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LWI((RMSTACK-4), rSP) /* preserve AX pushed in physcode */
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LWI((RMUADDR-KZERO), rBP)
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/* offsets are in Ureg */
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LXW(44, xBP, rAX)
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MOVW AX, DS
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LXW(40, xBP, rAX)
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MOVW AX, ES
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OPSIZE; LXW(0, xBP, rDI)
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OPSIZE; LXW(4, xBP, rSI)
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OPSIZE; LXW(16, xBP, rBX)
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OPSIZE; LXW(20, xBP, rDX)
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OPSIZE; LXW(24, xBP, rCX)
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OPSIZE; LXW(28, xBP, rAX)
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CLC
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/* assume that SP and SS persist across INT */
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TEXT realmodeintrinst(SB), $0
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INT $0x00
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CLI /* who knows what evil the bios got up to */
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/* save the registers after the call */
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// CLR(rBP)
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// MTSR(rBP, rSS) /* 0000 -> rSS */
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// LWI((RMSTACK-4), rSP)
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OPSIZE; PUSHFL
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OPSIZE; PUSHL AX
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LWI((RMUADDR-KZERO), rBP)
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OPSIZE; SXW(rDI, 0, xBP)
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OPSIZE; SXW(rSI, 4, xBP)
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OPSIZE; SXW(rBX, 16, xBP)
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OPSIZE; SXW(rDX, 20, xBP)
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OPSIZE; SXW(rCX, 24, xBP)
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OPSIZE; POPL AX
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OPSIZE; SXW(rAX, 28, xBP)
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MOVW DS, AX
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OPSIZE; SXW(rAX, 44, xBP)
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MOVW ES, AX
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OPSIZE; SXW(rAX, 40, xBP)
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OPSIZE; POPL AX
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OPSIZE; SXW(rAX, 64, xBP) /* flags */
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/* re-enter protected mode and jump to 32-bit code */
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OPSIZE; MOVL $1, AX
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OPSIZE; MOVL AX, CR0
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/* JMPFAR SELECTOR(KESEG, SELGDT, 0):$again32bit(SB) /**/
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OPSIZE
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BYTE $0xEA
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LONG $again32bit-KZERO(SB)
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WORD $SELECTOR(KESEG, SELGDT, 0)
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TEXT again32bit(SB), $0
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MOVW $SELECTOR(KDSEG, SELGDT, 0),AX
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MOVW AX,DS
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MOVW AX,SS
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MOVW AX,ES
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MOVW AX,FS
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MOVW AX,GS
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/* enable paging and jump to kzero-address code */
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MOVL CR0, AX
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ORL $(PG|0x10000), AX /* PG|WP */
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MOVL AX, CR0
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LEAL again32kzero(SB), AX
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JMP* AX
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TEXT again32kzero(SB), $0
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/* breathe a sigh of relief - back in 32-bit protected mode */
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/* switch to old stack */
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PUSHL AX /* match popl below for 8l */
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MOVL $(RMSTACK-4), SP
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POPL SP
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/* restore idt */
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MOVL m0idtptr(SB),IDTR
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/* restore gdt */
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MOVL m0gdtptr(SB), GDTR
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CALL restoreregs(SB)
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RET
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TEXT realmodeend(SB), $0
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/*
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* Must be 4-byte aligned & within 8K of the image's start to be seen.
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*/
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NOP
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NOP
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NOP
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TEXT _multibootheader(SB), $0 /* CHECK alignment (4) */
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LONG $0x1BADB002 /* magic */
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LONG $0x00010003 /* flags */
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LONG $-(0x1BADB002 + 0x00010003) /* checksum */
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LONG $_multibootheader-KZERO(SB) /* header_addr */
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LONG $_start32p-KZERO(SB) /* load_addr */
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LONG $edata-KZERO(SB) /* load_end_addr */
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LONG $end-KZERO(SB) /* bss_end_addr */
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LONG $_start32p-KZERO(SB) /* entry_addr */
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LONG $0 /* mode_type */
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LONG $0 /* width */
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LONG $0 /* height */
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LONG $0 /* depth */
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293 |
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LONG $0 /* +48: saved AX - magic */
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LONG $0 /* +52: saved BX - info* */
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/*
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* There's no way with 8[al] to make this into local data, hence
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* the TEXT definitions. Also, it should be in the same segment as
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* the LGDT instruction.
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* In real mode only 24-bits of the descriptor are loaded so the
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* -KZERO is superfluous for the usual mappings.
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* The segments are
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* NULL
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* DATA 32b 4GB PL0
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* EXEC 32b 4GB PL0
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* EXEC 16b 4GB PL0
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*/
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309 |
TEXT _gdt16r(SB), $0
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310 |
LONG $0x0000; LONG $0
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311 |
LONG $0xFFFF; LONG $(SEGG|SEGB|(0xF<<16)|SEGP|SEGPL(0)|SEGDATA|SEGW)
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LONG $0xFFFF; LONG $(SEGG|SEGD|(0xF<<16)|SEGP|SEGPL(0)|SEGEXEC|SEGR)
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LONG $0xFFFF; LONG $(SEGG |(0xF<<16)|SEGP|SEGPL(0)|SEGEXEC|SEGR)
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314 |
TEXT _gdtptr16r(SB), $0
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315 |
WORD $(4*8)
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316 |
LONG $_gdt16r-KZERO(SB)
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