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#include	<u.h>
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#include	<ureg.h>
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#include	"../port/lib.h"
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#include	"mem.h"
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#include	"dat.h"
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#include	"fns.h"
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/*
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 *	We have one page table per processor.
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 *
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 *	Different processes are distinguished via the VSID field in
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 *	the segment registers.  As flushing the entire page table is an
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 *	expensive operation, we implement an aging algorithm for
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 *	mmu pids, with a background kproc to purge stale pids en mass.
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 *
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 *	This needs modifications to run on a multiprocessor.
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 */
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static ulong	ptabsize;			/* number of bytes in page table */
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static ulong	ptabmask;		/* hash mask */
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/*
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 *	VSID is 24 bits.  3 are required to distinguish segments in user
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 *	space (kernel space only uses the BATs).  pid 0 is reserved.
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 *	The top 2 bits of the pid are used as a `color' for the background
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 *	pid reclamation algorithm.
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 */
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enum {
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	PIDBASE = 1,
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	PIDBITS = 21,
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	COLBITS = 2,
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	PIDMAX = ((1<<PIDBITS)-1),
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	COLMASK = ((1<<COLBITS)-1),
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};
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#define	VSID(pid, i)	(((pid)<<3)|i)
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#define	PIDCOLOR(pid)	((pid)>>(PIDBITS-COLBITS))
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#define	PTECOL(color)	PTE0(1, VSID(((color)<<(PIDBITS-COLBITS)), 0), 0, 0)
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void
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mmuinit(void)
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{
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	int lhash, mem, i;
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	ulong memsize;
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	memsize = conf.npage * BY2PG;
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	if(ptabsize == 0) {
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		/* heuristically size the hash table */
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		lhash = 10;
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		mem = (1<<23);
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		while(mem < memsize) {
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			lhash++;
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			mem <<= 1;
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		}
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		ptabsize = (1<<(lhash+6));
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		ptabmask = (1<<lhash)-1;
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	}
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	m->ptabbase = (ulong)xspanalloc(ptabsize, 0, ptabsize);
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	/* set page table base address */
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	putsdr1(PADDR(m->ptabbase) | (ptabmask>>10));
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	m->mmupid = PIDBASE;
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	m->sweepcolor = 0;
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	m->trigcolor = COLMASK;
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	for(i = 0; i < 16; i++)
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		putsr(i<<28, 0);
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}
69
 
70
static int
71
work(void*)
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{
73
	return PIDCOLOR(m->mmupid) == m->trigcolor;
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}
75
 
76
void
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mmusweep(void*)
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{
79
	Proc *p;
80
	int i, x, sweepcolor;
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	ulong *ptab, *ptabend, ptecol;
82
 
83
	for(;;) {
84
		if(PIDCOLOR(m->mmupid) != m->trigcolor)
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			sleep(&m->sweepr, work, nil);
86
 
87
		sweepcolor = m->sweepcolor;
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		x = splhi();
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		p = proctab(0);
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		for(i = 0; i < conf.nproc; i++, p++)
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			if(PIDCOLOR(p->mmupid) == sweepcolor)
92
				p->mmupid = 0;
93
		splx(x);
94
 
95
		ptab = (ulong*)m->ptabbase;
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		ptabend = (ulong*)(m->ptabbase+ptabsize);
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		ptecol = PTECOL(sweepcolor);
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		while(ptab < ptabend) {
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			if((*ptab & PTECOL(3)) == ptecol){
100
				*ptab = 0;
101
			}
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			ptab += 2;
103
		}
104
 
105
		m->sweepcolor = (sweepcolor+1) & COLMASK;
106
		m->trigcolor = (m->trigcolor+1) & COLMASK;
107
	}
108
}
109
 
110
int
111
newmmupid(void)
112
{
113
	int pid, newcolor, i, x;
114
	Proc *p;
115
 
116
	pid = m->mmupid++;
117
	if(m->mmupid > PIDMAX){
118
		/* Used up all mmupids, start again from first.  Flush the tlb
119
		 * to delete any entries with old pids remaining, then reassign
120
		 * all pids.
121
		 */
122
		m->mmupid = PIDBASE;
123
		x = splhi();
124
		tlbflushall();
125
		p = proctab(0);
126
		for(i = 0; i < conf.nproc; i++, p++)
127
			p->mmupid = 0;
128
		splx(x);
129
		wakeup(&m->sweepr);
130
	}
131
	newcolor = PIDCOLOR(m->mmupid);
132
	if(newcolor != PIDCOLOR(pid)) {
133
		if(newcolor == m->sweepcolor) {
134
			/* desperation time.  can't block here.  punt to fault/putmmu */
135
			print("newmmupid: %uld: no free mmu pids\n", up->pid);
136
			if(m->mmupid == PIDBASE)
137
				m->mmupid = PIDMAX;
138
			else
139
				m->mmupid--;
140
			pid = 0;
141
		}
142
		else if(newcolor == m->trigcolor)
143
			wakeup(&m->sweepr);
144
	}
145
	up->mmupid = pid;
146
	return pid;
147
}
148
 
149
void
150
flushmmu(void)
151
{
152
	int x;
153
 
154
	x = splhi();
155
	up->newtlb = 1;
156
	mmuswitch(up);
157
	splx(x);
158
}
159
 
160
/*
161
 * called with splhi
162
 */
163
void
164
mmuswitch(Proc *p)
165
{
166
	int i, mp;
167
	ulong r;
168
 
169
	if(p->kp) {
170
		for(i = 0; i < 8; i++)
171
			putsr(i<<28, 0);
172
		return;
173
	}
174
 
175
	if(p->newtlb) {
176
		p->mmupid = 0;
177
		p->newtlb = 0;
178
	}
179
	mp = p->mmupid;
180
	if(mp == 0)
181
		mp = newmmupid();
182
 
183
	for(i = 0; i < 8; i++){
184
		r = VSID(mp, i)|BIT(1)|BIT(2);
185
		putsr(i<<28, r);
186
	}
187
}
188
 
189
void
190
mmurelease(Proc* p)
191
{
192
	p->mmupid = 0;
193
}
194
 
195
void
196
putmmu(ulong va, ulong pa, Page *pg)
197
{
198
	int mp;
199
	char *ctl;
200
	ulong *p, *ep, *q, pteg;
201
	ulong vsid, hash;
202
	ulong ptehi, x;
203
	static ulong pva;
204
 
205
	/*
206
	 *	If mmupid is 0, mmuswitch/newmmupid was unable to assign us
207
	 *	a pid, hence we faulted.  Keep calling sched() until the mmusweep
208
	 *	proc catches up, and we are able to get a pid.
209
	 */
210
	while((mp = up->mmupid) == 0)
211
		sched();
212
 
213
	vsid = VSID(mp, va>>28);
214
	hash = (vsid ^ ((va>>12)&0xffff)) & ptabmask;
215
	ptehi = PTE0(1, vsid, 0, va);
216
	pteg = m->ptabbase + BY2PTEG*hash;
217
 
218
	p = (ulong*)pteg;
219
	ep = (ulong*)(pteg+BY2PTEG);
220
	q = nil;
221
 
222
	while(p < ep) {
223
		x = p[0];
224
		if(x == ptehi) {
225
			q = p;
226
			break;
227
		}
228
		if(q == nil && (x & BIT(0)) == 0)
229
			q = p;
230
		p += 2;
231
	}
232
	if(q == nil) {
233
		q = (ulong*)(pteg+m->slotgen);
234
		m->slotgen = (m->slotgen + BY2PTE) & (BY2PTEG-1);
235
	}
236
 
237
	if (q[0] != ptehi || q[1] != pa){
238
		tlbflush(va);
239
		m->tlbpurge++;
240
	}
241
	q[0] = ptehi;
242
	q[1] = pa;
243
 
244
	ctl = &pg->cachectl[m->machno];
245
	switch(*ctl) {
246
	case PG_NEWCOL:
247
	default:
248
		panic("putmmu: %d\n", *ctl);
249
		break;
250
	case PG_TXTFLUSH:
251
		dcflush((void*)pg->va, BY2PG);
252
		icflush((void*)pg->va, BY2PG);
253
		*ctl = PG_NOFLUSH;
254
		break;
255
	case PG_NOFLUSH:
256
		break;
257
	}
258
 
259
}
260
 
261
void
262
checkmmu(ulong, ulong)
263
{
264
}
265
 
266
void
267
countpagerefs(ulong*, int)
268
{
269
}
270
 
271
/*
272
 * Return the number of bytes that can be accessed via KADDR(pa).
273
 * If pa is not a valid argument to KADDR, return 0.
274
 */
275
ulong
276
cankaddr(ulong pa)
277
{
278
	if(pa >= -KZERO)
279
		return 0;
280
	return -KZERO - pa;
281
}
282