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/*
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 * mips 24k machine assist for routerboard rb450g (minimal for reboot)
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 */
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#include "mem.h"
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#include "mips.s"
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	NOSCHED
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TEXT	_main(SB), $0
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	MOVW	$setR30(SB), R30
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	JMP	main(SB)
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/* target for JALRHB in BARRIERS */
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TEXT ret(SB), $-4
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	JMP	(R22)
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	NOP
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TEXT	setsp(SB), $-4
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	MOVW	R1, SP
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	RETURN
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TEXT	coherence(SB), $-4
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	BARRIERS(7, R7, cohhb)
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	SYNC
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	EHB
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	RETURN
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/*
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 *  cache manipulation
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 */
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/* the i and d caches may be different sizes, so clean them separately */
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TEXT	cleancache(SB), $-4
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	DI(10)				/* intrs off, old status -> R10 */
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	SYNC
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	EHB
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	MOVW	R0, R1			/* index, not address */
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	MOVW	$ICACHESIZE, R9
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iccache:
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	CACHE	PI+IWBI, (R1)		/* flush & invalidate I by index */
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	SUBU	$CACHELINESZ, R9
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	ADDU	$CACHELINESZ, R1
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	BGTZ	R9, iccache
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	NOP
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	MOVW	R0, R1			/* index, not address */
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	MOVW	$DCACHESIZE, R9
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dccache:
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	CACHE	PD+IWBI, (R1)		/* flush & invalidate D by index */
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	SUBU	$CACHELINESZ, R9
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	ADDU	$CACHELINESZ, R1
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	BGTZ	R9, dccache
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	NOP
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	SYNC
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	MOVW	R10, M(STATUS)
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	JRHB(31)			/* return and clear all hazards */
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	SCHED