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/*
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 * on return from this function we will be running in virtual mode.
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 * We set up the Block Address Translation (BAT) registers thus:
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 * 1) first 3 BATs are 256M blocks, starting from KZERO->0
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 * 2) remaining BAT maps last 256M directly
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 */
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TEXT	mmuinit0(SB), $0
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	/* reset all the tlbs */
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	MOVW	$64, R3
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	MOVW	R3, CTR
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	MOVW	$0, R4
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tlbloop:
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	TLBIE	R4
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	SYNC
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	ADD		$BIT(19), R4
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	BDNZ	tlbloop
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	TLBSYNC
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	/* BATs 0 and 1 cover memory from 0x00000000 to 0x20000000 */
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	/* KZERO -> 0, IBAT2 and DBAT2, 256 MB */
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	MOVW	$(KZERO|(0x7ff<<2)|2), R3
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	MOVW	$(PTEVALID|PTEWRITE), R4	/* PTEVALID => Cache coherency on */
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	MOVW	R3, SPR(DBATU(2))
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	MOVW	R4, SPR(DBATL(2))
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	MOVW	R3, SPR(IBATU(2))
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	MOVW	R4, SPR(IBATL(2))
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	/* enable MMU */
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	MOVW	LR, R3
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	OR		$KZERO, R3
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	MOVW	R3, SPR(SRR0)	/* Stored PC for RFI instruction */
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	MOVW	MSR, R4
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	OR		$(MSR_IR|MSR_DR|MSR_RI|MSR_FP), R4
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	MOVW	R4, SPR(SRR1)
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	RFI		/* resume in kernel mode in caller */
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	RETURN