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/*
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    		 Crown Copyright (c) 1997
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    This TenDRA(r) Computer Program is subject to Copyright
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    owned by the United Kingdom Secretary of State for Defence
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    acting through the Defence Evaluation and Research Agency
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    (DERA).  It is made available to Recipients with a
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    royalty-free licence for its use, reproduction, transfer
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    to other parties and amendment for any purpose not excluding
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    product development provided that any such use et cetera
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    shall be deemed to be acceptance of the following conditions:-
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        (1) Its Recipients shall ensure that this Notice is
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        reproduced upon any copies or amended versions of it;
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        (2) Any amended version of it shall be clearly marked to
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        show both the nature of and the organisation responsible
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        for the relevant amendment or amendments;
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        (3) Its onward transfer from a recipient to another
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        party shall be deemed to be that party's acceptance of
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        these conditions;
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        (4) DERA gives no warranty or assurance as to its
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        quality or suitability for any purpose and DERA accepts
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        no liability whatsoever in relation to any use to which
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        it may be put.
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*/
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/*
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  sched_config.h
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*/
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#ifndef H_SCHED_CONFIG
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#define H_SCHED_CONFIG
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#define NUM_CLASSES		((Unsigned) 20)
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#define NUM_FUNC_UNITS		((Unsigned) 7)
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#define NUM_RESOURCES		((Unsigned) 69)
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#define NUM_INSTRUCTIONS	18
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#define INSTRUCTION_SIZE	4
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#define MEMORY_LATENCY		((Unsigned) 6)
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/* #define USE_MY_INSTRUCTION_DATA 0*/
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#define CHANGE_OVER		1
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#define REMOVE_TEXT		1
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#define FS_TEXT_AVAILABLE	1	/* can we assume existence of the 'text' macro ? */
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#define FS_ASSERT		DEBUG	/*  ASSERT has no effect unless DEBUG is 1  */
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#define FS_DUAL_ISSUE		1
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#define FS_PIPELINE_DIAGRAM	0
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#define FS_NOP_REQUIRED		0
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#define FS_NOP_SYMBOL		"NOP"
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#define FS_FUNIT_FROM_CLASS	1
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#define FS_CYCLES_FROM_CLASS	1
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#define FS_DEDUCE_MEM_USES	1
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#define FS_STACK_REGISTER	R30
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#define FS_FIXED_ZERO_REGISTER	R31
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#define FS_FLOAT_ZERO_REGISTER	F31
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#undef FS_ENUMERATION
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#define FS_ENUMERATION 1
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#define MAX_USES		5	/* maximum number of registers used by an instruction */
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#define MAX_SETS		2	/* maximum number of registers set  by an instruction */
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#define MAX_NODES		((Unsigned) 3000)
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#define MAX_DEPTH		100
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#define SCALE_FACTOR		4
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#define PIPE_LENGTH		((size_t) 25)
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#define NODE_BLOCK_SIZE		((size_t) 1000)
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#define INST_BLOCK_SIZE		((size_t) 1000)
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#define LIST_BLOCK_SIZE		((size_t) 1000)
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#define TIDY_UP			1
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#define SAVE_SPACE	       0
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#define UNALIGNED_ACCESS_OFFSET_ADJUSTMENT -7
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#define UNALIGNED_ACCESS_SIZE_ADJUSTMENT   7
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#define is_in_ibus1 1		/*	Is in instruction bus 1				*/
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#define is_in_ibus2 2		/*	Is in instruction bus 2				*/
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#define is_in_abox  4		/*	Is in address box				*/
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#define is_in_bbox  8		/*	Is in branch box				*/
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#endif